ATmega128
Block Diagram
Figure 2. Block Diagram
VCC
GND
PF0 - PF7
PORTF DRIVERS
PA0 - PA7
PORTA DRIVERS
PC0 - PC7
PORTC DRIVERS
DATA REGISTER
PORTF
DATA DIR.
REG. PORTF
DATA REGISTER
PORTA
DATA DIR.
REG. PORTA
DATA REGISTER
PORTC
DATA DIR.
REG. PORTC
8-BIT DATA BUS
AVCC
CALIB. OSC
AGND
AREF
ADC
INTERNAL
OSCILLATOR
OSCILLATOR
JTAG TAP
ON-CHIP DEBUG
BOUNDARY-
SCAN
PROGRAM
COUNTER
PROGRAM
FLASH
INSTRUCTION
REGISTER
STACK
POINTER
SRAM
GENERAL
PURPOSE
WATCHDOG
TIMER
MCU CONTROL
REGISTER
TIMER/
COUNTERS
OSCILLATOR
TIMING AND
CONTROL
REGISTERS
X
PEN
PROGRAMMING
LOGIC
INSTRUCTION
DECODER
CONTROL
LINES
Y
Z
ALU
INTERRUPT
UNIT
EEPROM
STATUS
REGISTER
USART0
SPI
USART1
TWO-WIRE SERIAL
INTERFACE
DATA REGISTER
PORTE
DATA DIR.
REG. PORTE
DATA REGISTER
PORTB
DATA DIR.
REG. PORTB
DATA REGISTER
PORTD
DATA DIR.
REG. PORTD
DATA REG.
PORTG
DATA DIR.
REG. PORTG
PORTE DRIVERS
PE0 - PE7
PORTB DRIVERS
PB0 - PB7
PORTD DRIVERS
PD0 - PD7
PORTG DRIVERS
PG0 - PG4
3
2467X–AVR–06/11
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